TMDXEVM5515【PDF 1/159 页】EVAL MODULE DSP FOR C55XX

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TMS320C5515

www.ti.com

SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013

TMS320C5515 Fixed-Point Digital Signal Processor

Check for Samples: TMS320C5515

1 Fixed-Point Digital Signal Processor

1.1

Features

? High-Performance, Low-Power, TMS320C55x?

Fixed-Point Digital Signal Processor

– 16.67-, 13.33-, 10-, 8.33-ns Instruction Cycle

Time

– 60-, 75-, 100-, 120-MHz Clock Rate

– One/Two Instructions Executed per Cycle

– Dual Multipliers [Up to 200 or 240 Million

Multiply-Accumulates per Second (MMACS)]

– Two Arithmetic/Logic Units (ALUs)

– Three Internal Data/Operand Read Buses

and Two Internal Data/Operand Write Buses

– Software-Compatible With C55x Devices

– Industrial Temperature Devices Available

? 320K Bytes Zero-Wait State On-Chip RAM,

Composed of:

– 64K Bytes of Dual-Access RAM (DARAM),

8 Blocks of 4K x 16-Bit

– 256K Bytes of Single-Access RAM (SARAM),

32 Blocks of 4K x 16-Bit

? 128K Bytes of Zero Wait-State On-Chip ROM

(4 Blocks of 16K x 16-Bit)

? 4M x 16-Bit Maximum Addressable External

Memory Space (SDRAM/mSDRAM)

? 16-/8-Bit External Memory Interface (EMIF) with

Glueless Interface to:

– 8-/16-Bit NAND Flash, 1- and 4-Bit ECC

– 8-/16-Bit NOR Flash

– Asynchronous Static RAM (SRAM)

– SDRAM/mSDRAM (1.8-, 2.5-, 2.75-, and 3.3-V)

? Direct Memory Access (DMA) Controller

– Four DMA With 4 Channels Each (16-

Channels Total)

? Three 32-Bit General-Purpose Timers

– One Selectable as a Watchdog and/or GP

? Two MultiMedia Card/Secure Digital (MMC/SD)

Interfaces

? Universal Asynchronous Receiver/Transmitter

(UART)

? Serial-Port Interface (SPI) With Four Chip-

Selects

? Master/Slave Inter-Integrated Circuit (I 2 C Bus?)

? Four Inter-IC Sound (I 2 S Bus?) for Data

Transport

? Device USB Port With Integrated 2.0 High-

Speed PHY that Supports:

– USB 2.0 Full- and High-Speed Device

? LCD Bridge With Asynchronous Interface

? Tightly-Coupled FFT Hardware Accelerator

? 10-Bit 4-Input Successive Approximation (SAR)

ADC

? Real-Time Clock (RTC) With Crystal Input, With

Separate Clock Domain and Power Supply

? Four Core Isolated Power Supply Domains:

Analog, RTC, CPU and Peripherals, and USB

? Four I/O Isolated Power Supply Domains: RTC

I/O, EMIF I/O, USB PHY, and DV DDIO

? Three integrated LDOs (DSP_LDO, ANA_LDO,

and USB_LDO) to power the isolated domains:

DSP Core, Analog, and USB Core, respectively

? Low-Power S/W Programmable Phase-Locked

Loop (PLL) Clock Generator

? On-Chip ROM Bootloader (RBL) to Boot From

NAND Flash, NOR Flash, SPI EEPROM, SPI

Serial Flash or I2C EEPROM

? IEEE-1149.1 (JTAG)

Boundary-Scan-Compatible

? Up to 26 General-Purpose I/O (GPIO) Pins

(Multiplexed With Other Device Functions)

? 196-Terminal Pb-Free Plastic BGA (Ball Grid

Array) (ZCH Suffix)

? 1.05-V Core (60 or 75 MHz), 1.8-V, 2.5-V, 2.75-V,

or 3.3-V I/Os

? 1.3-V Core (100, 120 MHz), 1.8-V, 2.5-V, 2.75-V,

or 3.3-V I/Os

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Products conform to

specifications per the terms of the Texas Instruments standard warranty. Production

processing does not necessarily include testing of all parameters.

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